Expected Outcome:
- Advanced integrated photonic devices and circuits with enhanced functionality and performance enabling wider application across multiple sectors including digital, automotive, industrial, health and security
- Reinforced competitiveness of EU photonics actors by demonstrating advancements in representative system configurations and validating real-world applicability
- Significantly improved performance of electro-optic systems in applications such as communication, computing, sensing, medical diagnostics, data processing, AI supporting the introduction of photonic elements into such systems
- Low power consumption sensors with increased performance in application domains
Scope:
R&I should enhance the functionality, efficiency, and integration of photonic devices and circuits with a focus extended system performance. Action should address at least two of the following aspects.
- Enhanced performance through improved spectral purity, wavelength coverage, output power and noise characteristics.
- Increased modulation or detection speeds going beyond the capability of existing PIC material platforms, improved signal-processing capabilities, and integration of novel materials such as thin-film LiNbO3, BTO, graphene, silicon carbide, phase change materials and TMDCs.
- Miniaturised, high-complexity photonic circuits (e.g. multilayer photonics, chiplets, multiple integrated functional elements), scalable interconnects and electronics-photonics integration (co-packaged, heterogeneous, or monolithic) to improve performance, reliability, and cost-efficiency.
- Reduction of power consumption for example through improved electrical-to-optical conversion, lower optical losses, devices operable at higher temperatures to reduce cooling needs, and low-power circuit actuation and control.
Proposals should consider system-level impact and demonstrate advancements in representative configurations relevant to one or more application domains.
This topic implements the co-programmed European Partnership on photonics.
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Activities are expected to start at TRL 3 and achieve TRL 6 by the end of the project – see General Annex B.